MEMTONOMY

Optimizing Memory for Advanced Driver Assistance Systems and Autonomous Driving

Research project on memory issues in autonomous driving

Fraunhofer aims to close research gap with the participation of Bosch and TU Kaiserslautern

Heterogeneous multi-core architectures enhanced by custom accelerator cores are widely used today in many embedded applications. These types of computer platforms, which were originally developed for consumer applications, are now entering safety-critical applications, especially in the automotive domain, where autonomous driving is currently disrupting conventional automotive electronics development. The immense computing power of such architectures brings additional great challenges. The increasing gap between the speed of these heterogeneous multi-core architectures and accesses to the main memories poses a severe limit.

The dominant type of main memories are Dynamic Random Access Memories (DRAMs), which offer the best trade-off between storage density and access times. Algorithms for Advanced Driver Assistance Systems (ADAS) and Autonomous Driving (AD) in automotive require low latency and huge external memory bandwidth. Thus, memory bandwidth becomes one of the big bottlenecks. DRAMs are commodity devices optimized for minimum cost per storage bit. Hence, the DRAM package has to be cheap, which limits the available package pins. Furthermore, DRAMs have a complex internal architecture with advanced internal prefetching to bridge the gap between externally available memory bandwidth and internal latency.

DRAM technologies exhibit great parameter variation (speed sorting) and the storage cells, which are very sensitive to temperature, must be refreshed regularly. These features make it very challenging to use DRAMs in safety-critical applications. In recent years, many new DRAM memory devices have been presented (e.g., DDR4, LPDDR4, GDDR6, Wide I/O, HMB2). It is not yet clear, however, how to use these memory modules and how they will perform in the automotive context with respect to bandwidth, latency, power, temperature, reliability, safety, and security.

To date, scientific DRAM research has mainly focused on mobile devices and data centers. These applications have totally different profiles compared to the safety-critical automotive domain. Thus, there is great need to close this research gap by transferring basic research into industry, taking into account automotive application requirements. To the best of our knowledge, there are no investigations or publications that optimize the DRAM memory subsystem with respect to future automotive applications.

Fraunhofer IESE - Memtonomy Autonomous Driving
MEMTONOMY - Research project on memory issues in autonomous driving
Fraunhofer IESE - Memtonomy Autonome Systeme Projektpartner Transfer

Project Partners of MEMTONOMY

MEMTONOMY is a trilateral transfer project that further develops the results of basic research at the Technical University of Kaiserslautern (DFG project WE2442/10-1) towards applicability for the automotive industry. Fraunhofer IESE will support and coordinate this transfer with their strong background in safety for automotive and embedded systems. The application partner Bosch, one of the major automotive suppliers, will provide detailed application know-how, requirements, and concrete research challenges from an industry perspective.

Funded by the DFG and Fraunhofer

Fraunhofer IESE - Project MEMTONOMY
Fraunhofer IESE - Project MEMTONOMY
© Fraunhofer
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The MEMTONOMY project is funded by the German Research Foundation (DFG) and the Fraunhofer-Gesellschaft. Funding is provided for trilateral transfer projects of researchers from universities/universities of applied science, Fraunhofer Institutes, and application partners that aim to close the gap between basic research and application.

More about trilateral transfer projects

ATZ electronics worldwide 11|2020

Modern Memory Architectures for High-performance Infotainment Systems and Autonomous Driving

Semiconductor memories such as DRAMs or flash are often an aspect that receives little attention, but in future vehicle architectures they will become a limiting factor if important aspects are neglected during the design. Fraunhofer IESE, Mercedes-Benz Research & Development and Technische Universität Kaiserslautern show in a ATZelektronik paper what needs to be considered.

 

HiPEAC Tech Transfer Awards 2020

Winners of

Matthias Jung (Fraunhofer IESE), Lukas Steiner and Norbert Wehn (TUK) DRAMSys4.0: A flexible DRAM subsystem design space exploration framework

Fraunhofer IESE-Blog

News about Autonomous Systems

Learn more about autonomous systems on our blog.

Simulation-Framework for DRAM

DRAMSys: Tool for optimizing memory systems through simulation analyzes

Publications

  • DRAMSys4.0: A Fast and Cycle-Accurate SystemC/TLM-Based DRAM Simulator
    L. Steiner, M. Jung, F. S. Prado, K. Bykov, and N. Wehn Springer LNCS International Conference on Embedded Computer Systems Architectures Modeling and Simulation (SAMOS), July, 2020, Samos Island, Greece.

  • The Dynamic Random Access Memory Challenge in Embedded Computing Systems
    M. Jung, C. Weis, and N. Wehn In Jian-Jia Chen (Eds.), A Journey of Embedded and Cyber-Physical Systems., July, 2020, Springer
    To the Publication

  • Fast and Accurate DRAM Simulation: Can we Further Accelerate it?
    J. Feldmann, M. Jung, K. Kraft, L. Steiner and N. Wehn. IEEE Conference Design, Automation and Test in Europe (DATE), March, 2020, Grenoble, France
    To the Publication

  • Fast Validation of DRAM Protocols with Timed Petri Nets
    M.Jung, K.Kraft, T. Soliman, C. Sudarshan, C. Weis and N.Wehn ACM/IEEE International Symposium on Memory Systems (MEMSYS 2019), October, 2019, Washington, DC, USA, Chair's Choice Best Paper Award
    To the Publication

  • Driving Into the Memory Wall: The Role of Memory for Advanced Driver Assistance Systems and Autonomous Driving
    M. Jung, S. A. McKee, C. Sudarshan, C. Dropmann, C. Weis, N. Wehn, ACM International Symposium on Memory Systems (MEMSYS 2018), October, 2018, Washington, DC, USA
    To the Publication

 

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