Research project on memory issues in autonomous driving
Fraunhofer aims to close research gap with the participation of Bosch and TU Kaiserslautern
Heterogeneous multi-core architectures enhanced by custom accelerator cores are widely used today in many embedded applications. These types of computer platforms, which were originally developed for consumer applications, are now entering safety-critical applications, especially in the automotive domain, where autonomous driving is currently disrupting conventional automotive electronics development. The immense computing power of such architectures brings additional great challenges. The increasing gap between the speed of these heterogeneous multi-core architectures and accesses to the main memories poses a severe limit.
The dominant type of main memories are Dynamic Random Access Memories (DRAMs), which offer the best trade-off between storage density and access times. Algorithms for Advanced Driver Assistance Systems (ADAS) and Autonomous Driving (AD) in automotive require low latency and huge external memory bandwidth. Thus, memory bandwidth becomes one of the big bottlenecks. DRAMs are commodity devices optimized for minimum cost per storage bit. Hence, the DRAM package has to be cheap, which limits the available package pins. Furthermore, DRAMs have a complex internal architecture with advanced internal prefetching to bridge the gap between externally available memory bandwidth and internal latency.
DRAM technologies exhibit great parameter variation (speed sorting) and the storage cells, which are very sensitive to temperature, must be refreshed regularly. These features make it very challenging to use DRAMs in safety-critical applications. In recent years, many new DRAM memory devices have been presented (e.g., DDR4, LPDDR4, GDDR6, Wide I/O, HMB2). It is not yet clear, however, how to use these memory modules and how they will perform in the automotive context with respect to bandwidth, latency, power, temperature, reliability, safety, and security.
To date, scientific DRAM research has mainly focused on mobile devices and data centers. These applications have totally different profiles compared to the safety-critical automotive domain. Thus, there is great need to close this research gap by transferring basic research into industry, taking into account automotive application requirements. To the best of our knowledge, there are no investigations or publications that optimize the DRAM memory subsystem with respect to future automotive applications.